1. Field of the Invention
This invention relates generally to microcomputers and, more particularly, to an apparatus for reducing the power consumed by static microprocessors.
2. Description of the Prior Art
Microcomputers are sophisticated, general purpose logic devices which can be programmed to perform a wide variety of useful control functions in industrial and communications equipment, large scale and medium scale computer peripheral and terminal hardware, automobiles and other transportation media, amusement and educational devices, household appliances and other consumer goods, and the like. Generally, an entire spectrum of microcomputers is presently available in the commercial marketplace. As the speed of operation increases, the more valuable and more versatile the microcomputer becomes since it is capable of controlling the given operation more efficiently and more accurately, of controlling a greater number of operations simultaneously, and of controlling operations requiring relatively fast response times.
The throughput of any given microcomputer is a function of, among other things, the number of machine cycles required to execute a given set of instructions. In the course of designing any computer system, and in particular a microcomputer, a set of instructions is selected which will provide the anticipated program requirements for the projected market in which the computer system is to be used. The microprocessor, or processor component of a single chip microcomputer, executes each instruction as a sequence of machine cycles, with the more complex instructions consuming a greater number of machine cycles.
The operation of the internal circuitry of the microprocessor is synchronized by means of a master clock signal applied to the microprocessor. The master clock signal may actually comprise two or even four clock components; i.e., the microprocessor clock may be two phase or four phase. During the basic clock cycle known as the machine cycle, a number of internal processor related operations may take place simultaneously including the transfer of digital information from a bus to a register or vice versa, between certain registers, from an address or data buffer to a bus or vice versa, and so forth. Additionally, the individual conductors of a bus may each be set to a predetermined logic level, or the contents of a register may be set to a predetermined logic level.
It is also desirable, particularly with respect to microcomputers intended for marketing in the middle to low end of the price scale, to minimize the computer chip size as much as possible.
Static microprocessors implemented with complementary MOS technology (CMOS) exhibits low DC current drain. Such systems are thus considered to consume less power and little power when operating. To further reduce power consumption, one known system utilizes a HALT instruction which inhibits processor execution. However, all clock signals utilized by the processor continue to be generated. Since a static microprocessor will maintain its state even in the absence of clock signals, it would be desirable to provide an apparatus for disabling clock signals in an intelligent manner until further processor operations become necessary.